R/IntrinsicEnums.R

In duncantl/Rllvm: Interface to llvm for dynamically compiling native code.

IntrinsicIDs <- 
structure(1:2487, .Names = c("adjust_trampoline", "annotation", 
"arm_cdp", "arm_cdp2", "arm_get_fpscr", "arm_ldrexd", "arm_mcr", 
"arm_mcr2", "arm_mcrr", "arm_mcrr2", "arm_mrc", "arm_mrc2", "arm_neon_vabds", 
"arm_neon_vabdu", "arm_neon_vabs", "arm_neon_vacged", "arm_neon_vacgeq", 
"arm_neon_vacgtd", "arm_neon_vacgtq", "arm_neon_vaddhn", "arm_neon_vbsl", 
"arm_neon_vcls", "arm_neon_vclz", "arm_neon_vcnt", "arm_neon_vcvtfp2fxs", 
"arm_neon_vcvtfp2fxu", "arm_neon_vcvtfp2hf", "arm_neon_vcvtfxs2fp", 
"arm_neon_vcvtfxu2fp", "arm_neon_vcvthf2fp", "arm_neon_vhadds", 
"arm_neon_vhaddu", "arm_neon_vhsubs", "arm_neon_vhsubu", "arm_neon_vld1", 
"arm_neon_vld2", "arm_neon_vld2lane", "arm_neon_vld3", "arm_neon_vld3lane", 
"arm_neon_vld4", "arm_neon_vld4lane", "arm_neon_vmaxs", "arm_neon_vmaxu", 
"arm_neon_vmins", "arm_neon_vminu", "arm_neon_vmullp", "arm_neon_vmulls", 
"arm_neon_vmullu", "arm_neon_vmulp", "arm_neon_vpadals", "arm_neon_vpadalu", 
"arm_neon_vpadd", "arm_neon_vpaddls", "arm_neon_vpaddlu", "arm_neon_vpmaxs", 
"arm_neon_vpmaxu", "arm_neon_vpmins", "arm_neon_vpminu", "arm_neon_vqabs", 
"arm_neon_vqadds", "arm_neon_vqaddu", "arm_neon_vqdmlal", "arm_neon_vqdmlsl", 
"arm_neon_vqdmulh", "arm_neon_vqdmull", "arm_neon_vqmovns", "arm_neon_vqmovnsu", 
"arm_neon_vqmovnu", "arm_neon_vqneg", "arm_neon_vqrdmulh", "arm_neon_vqrshiftns", 
"arm_neon_vqrshiftnsu", "arm_neon_vqrshiftnu", "arm_neon_vqrshifts", 
"arm_neon_vqrshiftu", "arm_neon_vqshiftns", "arm_neon_vqshiftnsu", 
"arm_neon_vqshiftnu", "arm_neon_vqshifts", "arm_neon_vqshiftsu", 
"arm_neon_vqshiftu", "arm_neon_vqsubs", "arm_neon_vqsubu", "arm_neon_vraddhn", 
"arm_neon_vrecpe", "arm_neon_vrecps", "arm_neon_vrhadds", "arm_neon_vrhaddu", 
"arm_neon_vrshiftn", "arm_neon_vrshifts", "arm_neon_vrshiftu", 
"arm_neon_vrsqrte", "arm_neon_vrsqrts", "arm_neon_vrsubhn", "arm_neon_vshiftins", 
"arm_neon_vshiftls", "arm_neon_vshiftlu", "arm_neon_vshiftn", 
"arm_neon_vshifts", "arm_neon_vshiftu", "arm_neon_vst1", "arm_neon_vst2", 
"arm_neon_vst2lane", "arm_neon_vst3", "arm_neon_vst3lane", "arm_neon_vst4", 
"arm_neon_vst4lane", "arm_neon_vsubhn", "arm_neon_vtbl1", "arm_neon_vtbl2", 
"arm_neon_vtbl3", "arm_neon_vtbl4", "arm_neon_vtbx1", "arm_neon_vtbx2", 
"arm_neon_vtbx3", "arm_neon_vtbx4", "arm_qadd", "arm_qsub", "arm_set_fpscr", 
"arm_ssat", "arm_strexd", "arm_thread_pointer", "arm_usat", "arm_vcvtr", 
"arm_vcvtru", "bswap", "convert_from_fp16", "convert_to_fp16", 
"convertff", "convertfsi", "convertfui", "convertsif", "convertss", 
"convertsu", "convertuif", "convertus", "convertuu", "cos", "ctlz", 
"ctpop", "cttz", "cuda_syncthreads", "dbg_declare", "dbg_value", 
"debugtrap", "donothing", "eh_dwarf_cfa", "eh_return_i32", "eh_return_i64", 
"eh_sjlj_callsite", "eh_sjlj_functioncontext", "eh_sjlj_longjmp", 
"eh_sjlj_lsda", "eh_sjlj_setjmp", "eh_typeid_for", "eh_unwind_init", 
"exp", "exp2", "expect", "fabs", "floor", "flt_rounds", "fma", 
"fmuladd", "frameaddress", "gcread", "gcroot", "gcwrite", "hexagon_A2_abs", 
"hexagon_A2_absp", "hexagon_A2_abssat", "hexagon_A2_add", "hexagon_A2_addh_h16_hh", 
"hexagon_A2_addh_h16_hl", "hexagon_A2_addh_h16_lh", "hexagon_A2_addh_h16_ll", 
"hexagon_A2_addh_h16_sat_hh", "hexagon_A2_addh_h16_sat_hl", "hexagon_A2_addh_h16_sat_lh", 
"hexagon_A2_addh_h16_sat_ll", "hexagon_A2_addh_l16_hl", "hexagon_A2_addh_l16_ll", 
"hexagon_A2_addh_l16_sat_hl", "hexagon_A2_addh_l16_sat_ll", "hexagon_A2_addi", 
"hexagon_A2_addp", "hexagon_A2_addpsat", "hexagon_A2_addsat", 
"hexagon_A2_addsp", "hexagon_A2_and", "hexagon_A2_andir", "hexagon_A2_andp", 
"hexagon_A2_aslh", "hexagon_A2_asrh", "hexagon_A2_combine_hh", 
"hexagon_A2_combine_hl", "hexagon_A2_combine_lh", "hexagon_A2_combine_ll", 
"hexagon_A2_combineii", "hexagon_A2_combinew", "hexagon_A2_max", 
"hexagon_A2_maxp", "hexagon_A2_maxu", "hexagon_A2_maxup", "hexagon_A2_min", 
"hexagon_A2_minp", "hexagon_A2_minu", "hexagon_A2_minup", "hexagon_A2_neg", 
"hexagon_A2_negp", "hexagon_A2_negsat", "hexagon_A2_not", "hexagon_A2_notp", 
"hexagon_A2_or", "hexagon_A2_orir", "hexagon_A2_orp", "hexagon_A2_roundsat", 
"hexagon_A2_sat", "hexagon_A2_satb", "hexagon_A2_sath", "hexagon_A2_satub", 
"hexagon_A2_satuh", "hexagon_A2_sub", "hexagon_A2_subh_h16_hh", 
"hexagon_A2_subh_h16_hl", "hexagon_A2_subh_h16_lh", "hexagon_A2_subh_h16_ll", 
"hexagon_A2_subh_h16_sat_hh", "hexagon_A2_subh_h16_sat_hl", "hexagon_A2_subh_h16_sat_lh", 
"hexagon_A2_subh_h16_sat_ll", "hexagon_A2_subh_l16_hl", "hexagon_A2_subh_l16_ll", 
"hexagon_A2_subh_l16_sat_hl", "hexagon_A2_subh_l16_sat_ll", "hexagon_A2_subp", 
"hexagon_A2_subri", "hexagon_A2_subsat", "hexagon_A2_svaddh", 
"hexagon_A2_svaddhs", "hexagon_A2_svadduhs", "hexagon_A2_svavgh", 
"hexagon_A2_svavghs", "hexagon_A2_svnavgh", "hexagon_A2_svsubh", 
"hexagon_A2_svsubhs", "hexagon_A2_svsubuhs", "hexagon_A2_swiz", 
"hexagon_A2_sxtb", "hexagon_A2_sxth", "hexagon_A2_sxtw", "hexagon_A2_tfr", 
"hexagon_A2_tfrih", "hexagon_A2_tfril", "hexagon_A2_tfrp", "hexagon_A2_tfrpi", 
"hexagon_A2_tfrsi", "hexagon_A2_vabsh", "hexagon_A2_vabshsat", 
"hexagon_A2_vabsw", "hexagon_A2_vabswsat", "hexagon_A2_vaddb_map", 
"hexagon_A2_vaddh", "hexagon_A2_vaddhs", "hexagon_A2_vaddub", 
"hexagon_A2_vaddubs", "hexagon_A2_vadduhs", "hexagon_A2_vaddw", 
"hexagon_A2_vaddws", "hexagon_A2_vavgh", "hexagon_A2_vavghcr", 
"hexagon_A2_vavghr", "hexagon_A2_vavgub", "hexagon_A2_vavgubr", 
"hexagon_A2_vavguh", "hexagon_A2_vavguhr", "hexagon_A2_vavguw", 
"hexagon_A2_vavguwr", "hexagon_A2_vavgw", "hexagon_A2_vavgwcr", 
"hexagon_A2_vavgwr", "hexagon_A2_vcmpbeq", "hexagon_A2_vcmpbgtu", 
"hexagon_A2_vcmpheq", "hexagon_A2_vcmphgt", "hexagon_A2_vcmphgtu", 
"hexagon_A2_vcmpweq", "hexagon_A2_vcmpwgt", "hexagon_A2_vcmpwgtu", 
"hexagon_A2_vconj", "hexagon_A2_vmaxb", "hexagon_A2_vmaxh", "hexagon_A2_vmaxub", 
"hexagon_A2_vmaxuh", "hexagon_A2_vmaxuw", "hexagon_A2_vmaxw", 
"hexagon_A2_vminb", "hexagon_A2_vminh", "hexagon_A2_vminub", 
"hexagon_A2_vminuh", "hexagon_A2_vminuw", "hexagon_A2_vminw", 
"hexagon_A2_vnavgh", "hexagon_A2_vnavghcr", "hexagon_A2_vnavghr", 
"hexagon_A2_vnavgw", "hexagon_A2_vnavgwcr", "hexagon_A2_vnavgwr", 
"hexagon_A2_vraddub", "hexagon_A2_vraddub_acc", "hexagon_A2_vrsadub", 
"hexagon_A2_vrsadub_acc", "hexagon_A2_vsubb_map", "hexagon_A2_vsubh", 
"hexagon_A2_vsubhs", "hexagon_A2_vsubub", "hexagon_A2_vsububs", 
"hexagon_A2_vsubuhs", "hexagon_A2_vsubw", "hexagon_A2_vsubws", 
"hexagon_A2_xor", "hexagon_A2_xorp", "hexagon_A2_zxtb", "hexagon_A2_zxth", 
"hexagon_A4_andn", "hexagon_A4_andnp", "hexagon_A4_bitsplit", 
"hexagon_A4_bitspliti", "hexagon_A4_boundscheck", "hexagon_A4_cmpbeq", 
"hexagon_A4_cmpbeqi", "hexagon_A4_cmpbgt", "hexagon_A4_cmpbgti", 
"hexagon_A4_cmpbgtu", "hexagon_A4_cmpbgtui", "hexagon_A4_cmpheq", 
"hexagon_A4_cmpheqi", "hexagon_A4_cmphgt", "hexagon_A4_cmphgti", 
"hexagon_A4_cmphgtu", "hexagon_A4_cmphgtui", "hexagon_A4_combineir", 
"hexagon_A4_combineri", "hexagon_A4_cround_ri", "hexagon_A4_cround_rr", 
"hexagon_A4_modwrapu", "hexagon_A4_orn", "hexagon_A4_ornp", "hexagon_A4_rcmpeq", 
"hexagon_A4_rcmpeqi", "hexagon_A4_rcmpneq", "hexagon_A4_rcmpneqi", 
"hexagon_A4_round_ri", "hexagon_A4_round_ri_sat", "hexagon_A4_round_rr", 
"hexagon_A4_round_rr_sat", "hexagon_A4_tlbmatch", "hexagon_A4_vcmpbeq_any", 
"hexagon_A4_vcmpbeqi", "hexagon_A4_vcmpbgt", "hexagon_A4_vcmpbgti", 
"hexagon_A4_vcmpbgtui", "hexagon_A4_vcmpheqi", "hexagon_A4_vcmphgti", 
"hexagon_A4_vcmphgtui", "hexagon_A4_vcmpweqi", "hexagon_A4_vcmpwgti", 
"hexagon_A4_vcmpwgtui", "hexagon_A4_vrmaxh", "hexagon_A4_vrmaxuh", 
"hexagon_A4_vrmaxuw", "hexagon_A4_vrmaxw", "hexagon_A4_vrminh", 
"hexagon_A4_vrminuh", "hexagon_A4_vrminuw", "hexagon_A4_vrminw", 
"hexagon_A5_vaddhubs", "hexagon_C2_all8", "hexagon_C2_and", "hexagon_C2_andn", 
"hexagon_C2_any8", "hexagon_C2_bitsclr", "hexagon_C2_bitsclri", 
"hexagon_C2_bitsset", "hexagon_C2_cmpeq", "hexagon_C2_cmpeqi", 
"hexagon_C2_cmpeqp", "hexagon_C2_cmpgei", "hexagon_C2_cmpgeui", 
"hexagon_C2_cmpgt", "hexagon_C2_cmpgti", "hexagon_C2_cmpgtp", 
"hexagon_C2_cmpgtu", "hexagon_C2_cmpgtui", "hexagon_C2_cmpgtup", 
"hexagon_C2_cmplt", "hexagon_C2_cmpltu", "hexagon_C2_mask", "hexagon_C2_mux", 
"hexagon_C2_muxii", "hexagon_C2_muxir", "hexagon_C2_muxri", "hexagon_C2_not", 
"hexagon_C2_or", "hexagon_C2_orn", "hexagon_C2_pxfer_map", "hexagon_C2_tfrpr", 
"hexagon_C2_tfrrp", "hexagon_C2_vitpack", "hexagon_C2_vmux", 
"hexagon_C2_xor", "hexagon_C4_and_and", "hexagon_C4_and_andn", 
"hexagon_C4_and_or", "hexagon_C4_and_orn", "hexagon_C4_cmplte", 
"hexagon_C4_cmpltei", "hexagon_C4_cmplteu", "hexagon_C4_cmplteui", 
"hexagon_C4_cmpneq", "hexagon_C4_cmpneqi", "hexagon_C4_fastcorner9", 
"hexagon_C4_fastcorner9_not", "hexagon_C4_nbitsclr", "hexagon_C4_nbitsclri", 
"hexagon_C4_nbitsset", "hexagon_C4_or_and", "hexagon_C4_or_andn", 
"hexagon_C4_or_or", "hexagon_C4_or_orn", "hexagon_F2_conv_d2df", 
"hexagon_F2_conv_d2sf", "hexagon_F2_conv_df2d", "hexagon_F2_conv_df2d_chop", 
"hexagon_F2_conv_df2sf", "hexagon_F2_conv_df2ud", "hexagon_F2_conv_df2ud_chop", 
"hexagon_F2_conv_df2uw", "hexagon_F2_conv_df2uw_chop", "hexagon_F2_conv_df2w", 
"hexagon_F2_conv_df2w_chop", "hexagon_F2_conv_sf2d", "hexagon_F2_conv_sf2d_chop", 
"hexagon_F2_conv_sf2df", "hexagon_F2_conv_sf2ud", "hexagon_F2_conv_sf2ud_chop", 
"hexagon_F2_conv_sf2uw", "hexagon_F2_conv_sf2uw_chop", "hexagon_F2_conv_sf2w", 
"hexagon_F2_conv_sf2w_chop", "hexagon_F2_conv_ud2df", "hexagon_F2_conv_ud2sf", 
"hexagon_F2_conv_uw2df", "hexagon_F2_conv_uw2sf", "hexagon_F2_conv_w2df", 
"hexagon_F2_conv_w2sf", "hexagon_F2_dfadd", "hexagon_F2_dfclass", 
"hexagon_F2_dfcmpeq", "hexagon_F2_dfcmpge", "hexagon_F2_dfcmpgt", 
"hexagon_F2_dfcmpuo", "hexagon_F2_dffixupd", "hexagon_F2_dffixupn", 
"hexagon_F2_dffixupr", "hexagon_F2_dffma", "hexagon_F2_dffma_lib", 
"hexagon_F2_dffma_sc", "hexagon_F2_dffms", "hexagon_F2_dffms_lib", 
"hexagon_F2_dfimm_n", "hexagon_F2_dfimm_p", "hexagon_F2_dfmax", 
"hexagon_F2_dfmin", "hexagon_F2_dfmpy", "hexagon_F2_dfsub", "hexagon_F2_sfadd", 
"hexagon_F2_sfclass", "hexagon_F2_sfcmpeq", "hexagon_F2_sfcmpge", 
"hexagon_F2_sfcmpgt", "hexagon_F2_sfcmpuo", "hexagon_F2_sffixupd", 
"hexagon_F2_sffixupn", "hexagon_F2_sffixupr", "hexagon_F2_sffma", 
"hexagon_F2_sffma_lib", "hexagon_F2_sffma_sc", "hexagon_F2_sffms", 
"hexagon_F2_sffms_lib", "hexagon_F2_sfimm_n", "hexagon_F2_sfimm_p", 
"hexagon_F2_sfmax", "hexagon_F2_sfmin", "hexagon_F2_sfmpy", "hexagon_F2_sfsub", 
"hexagon_M2_acci", "hexagon_M2_accii", "hexagon_M2_cmaci_s0", 
"hexagon_M2_cmacr_s0", "hexagon_M2_cmacs_s0", "hexagon_M2_cmacs_s1", 
"hexagon_M2_cmacsc_s0", "hexagon_M2_cmacsc_s1", "hexagon_M2_cmpyi_s0", 
"hexagon_M2_cmpyr_s0", "hexagon_M2_cmpyrs_s0", "hexagon_M2_cmpyrs_s1", 
"hexagon_M2_cmpyrsc_s0", "hexagon_M2_cmpyrsc_s1", "hexagon_M2_cmpys_s0", 
"hexagon_M2_cmpys_s1", "hexagon_M2_cmpysc_s0", "hexagon_M2_cmpysc_s1", 
"hexagon_M2_cnacs_s0", "hexagon_M2_cnacs_s1", "hexagon_M2_cnacsc_s0", 
"hexagon_M2_cnacsc_s1", "hexagon_M2_dpmpyss_acc_s0", "hexagon_M2_dpmpyss_nac_s0", 
"hexagon_M2_dpmpyss_rnd_s0", "hexagon_M2_dpmpyss_s0", "hexagon_M2_dpmpyuu_acc_s0", 
"hexagon_M2_dpmpyuu_nac_s0", "hexagon_M2_dpmpyuu_s0", "hexagon_M2_hmmpyh_rs1", 
"hexagon_M2_hmmpyh_s1", "hexagon_M2_hmmpyl_rs1", "hexagon_M2_hmmpyl_s1", 
"hexagon_M2_maci", "hexagon_M2_macsin", "hexagon_M2_macsip", 
"hexagon_M2_mmachs_rs0", "hexagon_M2_mmachs_rs1", "hexagon_M2_mmachs_s0", 
"hexagon_M2_mmachs_s1", "hexagon_M2_mmacls_rs0", "hexagon_M2_mmacls_rs1", 
"hexagon_M2_mmacls_s0", "hexagon_M2_mmacls_s1", "hexagon_M2_mmacuhs_rs0", 
"hexagon_M2_mmacuhs_rs1", "hexagon_M2_mmacuhs_s0", "hexagon_M2_mmacuhs_s1", 
"hexagon_M2_mmaculs_rs0", "hexagon_M2_mmaculs_rs1", "hexagon_M2_mmaculs_s0", 
"hexagon_M2_mmaculs_s1", "hexagon_M2_mmpyh_rs0", "hexagon_M2_mmpyh_rs1", 
"hexagon_M2_mmpyh_s0", "hexagon_M2_mmpyh_s1", "hexagon_M2_mmpyl_rs0", 
"hexagon_M2_mmpyl_rs1", "hexagon_M2_mmpyl_s0", "hexagon_M2_mmpyl_s1", 
"hexagon_M2_mmpyuh_rs0", "hexagon_M2_mmpyuh_rs1", "hexagon_M2_mmpyuh_s0", 
"hexagon_M2_mmpyuh_s1", "hexagon_M2_mmpyul_rs0", "hexagon_M2_mmpyul_rs1", 
"hexagon_M2_mmpyul_s0", "hexagon_M2_mmpyul_s1", "hexagon_M2_mpy_acc_hh_s0", 
"hexagon_M2_mpy_acc_hh_s1", "hexagon_M2_mpy_acc_hl_s0", "hexagon_M2_mpy_acc_hl_s1", 
"hexagon_M2_mpy_acc_lh_s0", "hexagon_M2_mpy_acc_lh_s1", "hexagon_M2_mpy_acc_ll_s0", 
"hexagon_M2_mpy_acc_ll_s1", "hexagon_M2_mpy_acc_sat_hh_s0", "hexagon_M2_mpy_acc_sat_hh_s1", 
"hexagon_M2_mpy_acc_sat_hl_s0", "hexagon_M2_mpy_acc_sat_hl_s1", 
"hexagon_M2_mpy_acc_sat_lh_s0", "hexagon_M2_mpy_acc_sat_lh_s1", 
"hexagon_M2_mpy_acc_sat_ll_s0", "hexagon_M2_mpy_acc_sat_ll_s1", 
"hexagon_M2_mpy_hh_s0", "hexagon_M2_mpy_hh_s1", "hexagon_M2_mpy_hl_s0", 
"hexagon_M2_mpy_hl_s1", "hexagon_M2_mpy_lh_s0", "hexagon_M2_mpy_lh_s1", 
"hexagon_M2_mpy_ll_s0", "hexagon_M2_mpy_ll_s1", "hexagon_M2_mpy_nac_hh_s0", 
"hexagon_M2_mpy_nac_hh_s1", "hexagon_M2_mpy_nac_hl_s0", "hexagon_M2_mpy_nac_hl_s1", 
"hexagon_M2_mpy_nac_lh_s0", "hexagon_M2_mpy_nac_lh_s1", "hexagon_M2_mpy_nac_ll_s0", 
"hexagon_M2_mpy_nac_ll_s1", "hexagon_M2_mpy_nac_sat_hh_s0", "hexagon_M2_mpy_nac_sat_hh_s1", 
"hexagon_M2_mpy_nac_sat_hl_s0", "hexagon_M2_mpy_nac_sat_hl_s1", 
"hexagon_M2_mpy_nac_sat_lh_s0", "hexagon_M2_mpy_nac_sat_lh_s1", 
"hexagon_M2_mpy_nac_sat_ll_s0", "hexagon_M2_mpy_nac_sat_ll_s1", 
"hexagon_M2_mpy_rnd_hh_s0", "hexagon_M2_mpy_rnd_hh_s1", "hexagon_M2_mpy_rnd_hl_s0", 
"hexagon_M2_mpy_rnd_hl_s1", "hexagon_M2_mpy_rnd_lh_s0", "hexagon_M2_mpy_rnd_lh_s1", 
"hexagon_M2_mpy_rnd_ll_s0", "hexagon_M2_mpy_rnd_ll_s1", "hexagon_M2_mpy_sat_hh_s0", 
"hexagon_M2_mpy_sat_hh_s1", "hexagon_M2_mpy_sat_hl_s0", "hexagon_M2_mpy_sat_hl_s1", 
"hexagon_M2_mpy_sat_lh_s0", "hexagon_M2_mpy_sat_lh_s1", "hexagon_M2_mpy_sat_ll_s0", 
"hexagon_M2_mpy_sat_ll_s1", "hexagon_M2_mpy_sat_rnd_hh_s0", "hexagon_M2_mpy_sat_rnd_hh_s1", 
"hexagon_M2_mpy_sat_rnd_hl_s0", "hexagon_M2_mpy_sat_rnd_hl_s1", 
"hexagon_M2_mpy_sat_rnd_lh_s0", "hexagon_M2_mpy_sat_rnd_lh_s1", 
"hexagon_M2_mpy_sat_rnd_ll_s0", "hexagon_M2_mpy_sat_rnd_ll_s1", 
"hexagon_M2_mpy_up", "hexagon_M2_mpy_up_s1", "hexagon_M2_mpy_up_s1_sat", 
"hexagon_M2_mpyd_acc_hh_s0", "hexagon_M2_mpyd_acc_hh_s1", "hexagon_M2_mpyd_acc_hl_s0", 
"hexagon_M2_mpyd_acc_hl_s1", "hexagon_M2_mpyd_acc_lh_s0", "hexagon_M2_mpyd_acc_lh_s1", 
"hexagon_M2_mpyd_acc_ll_s0", "hexagon_M2_mpyd_acc_ll_s1", "hexagon_M2_mpyd_hh_s0", 
"hexagon_M2_mpyd_hh_s1", "hexagon_M2_mpyd_hl_s0", "hexagon_M2_mpyd_hl_s1", 
"hexagon_M2_mpyd_lh_s0", "hexagon_M2_mpyd_lh_s1", "hexagon_M2_mpyd_ll_s0", 
"hexagon_M2_mpyd_ll_s1", "hexagon_M2_mpyd_nac_hh_s0", "hexagon_M2_mpyd_nac_hh_s1", 
"hexagon_M2_mpyd_nac_hl_s0", "hexagon_M2_mpyd_nac_hl_s1", "hexagon_M2_mpyd_nac_lh_s0", 
"hexagon_M2_mpyd_nac_lh_s1", "hexagon_M2_mpyd_nac_ll_s0", "hexagon_M2_mpyd_nac_ll_s1", 
"hexagon_M2_mpyd_rnd_hh_s0", "hexagon_M2_mpyd_rnd_hh_s1", "hexagon_M2_mpyd_rnd_hl_s0", 
"hexagon_M2_mpyd_rnd_hl_s1", "hexagon_M2_mpyd_rnd_lh_s0", "hexagon_M2_mpyd_rnd_lh_s1", 
"hexagon_M2_mpyd_rnd_ll_s0", "hexagon_M2_mpyd_rnd_ll_s1", "hexagon_M2_mpyi", 
"hexagon_M2_mpysmi", "hexagon_M2_mpysu_up", "hexagon_M2_mpyu_acc_hh_s0", 
"hexagon_M2_mpyu_acc_hh_s1", "hexagon_M2_mpyu_acc_hl_s0", "hexagon_M2_mpyu_acc_hl_s1", 
"hexagon_M2_mpyu_acc_lh_s0", "hexagon_M2_mpyu_acc_lh_s1", "hexagon_M2_mpyu_acc_ll_s0", 
"hexagon_M2_mpyu_acc_ll_s1", "hexagon_M2_mpyu_hh_s0", "hexagon_M2_mpyu_hh_s1", 
"hexagon_M2_mpyu_hl_s0", "hexagon_M2_mpyu_hl_s1", "hexagon_M2_mpyu_lh_s0", 
"hexagon_M2_mpyu_lh_s1", "hexagon_M2_mpyu_ll_s0", "hexagon_M2_mpyu_ll_s1", 
"hexagon_M2_mpyu_nac_hh_s0", "hexagon_M2_mpyu_nac_hh_s1", "hexagon_M2_mpyu_nac_hl_s0", 
"hexagon_M2_mpyu_nac_hl_s1", "hexagon_M2_mpyu_nac_lh_s0", "hexagon_M2_mpyu_nac_lh_s1", 
"hexagon_M2_mpyu_nac_ll_s0", "hexagon_M2_mpyu_nac_ll_s1", "hexagon_M2_mpyu_up", 
"hexagon_M2_mpyud_acc_hh_s0", "hexagon_M2_mpyud_acc_hh_s1", "hexagon_M2_mpyud_acc_hl_s0", 
"hexagon_M2_mpyud_acc_hl_s1", "hexagon_M2_mpyud_acc_lh_s0", "hexagon_M2_mpyud_acc_lh_s1", 
"hexagon_M2_mpyud_acc_ll_s0", "hexagon_M2_mpyud_acc_ll_s1", "hexagon_M2_mpyud_hh_s0", 
"hexagon_M2_mpyud_hh_s1", "hexagon_M2_mpyud_hl_s0", "hexagon_M2_mpyud_hl_s1", 
"hexagon_M2_mpyud_lh_s0", "hexagon_M2_mpyud_lh_s1", "hexagon_M2_mpyud_ll_s0", 
"hexagon_M2_mpyud_ll_s1", "hexagon_M2_mpyud_nac_hh_s0", "hexagon_M2_mpyud_nac_hh_s1", 
"hexagon_M2_mpyud_nac_hl_s0", "hexagon_M2_mpyud_nac_hl_s1", "hexagon_M2_mpyud_nac_lh_s0", 
"hexagon_M2_mpyud_nac_lh_s1", "hexagon_M2_mpyud_nac_ll_s0", "hexagon_M2_mpyud_nac_ll_s1", 
"hexagon_M2_mpyui", "hexagon_M2_nacci", "hexagon_M2_naccii", 
"hexagon_M2_subacc", "hexagon_M2_vabsdiffh", "hexagon_M2_vabsdiffw", 
"hexagon_M2_vcmac_s0_sat_i", "hexagon_M2_vcmac_s0_sat_r", "hexagon_M2_vcmpy_s0_sat_i", 
"hexagon_M2_vcmpy_s0_sat_r", "hexagon_M2_vcmpy_s1_sat_i", "hexagon_M2_vcmpy_s1_sat_r", 
"hexagon_M2_vdmacs_s0", "hexagon_M2_vdmacs_s1", "hexagon_M2_vdmpyrs_s0", 
"hexagon_M2_vdmpyrs_s1", "hexagon_M2_vdmpys_s0", "hexagon_M2_vdmpys_s1", 
"hexagon_M2_vmac2", "hexagon_M2_vmac2es", "hexagon_M2_vmac2es_s0", 
"hexagon_M2_vmac2es_s1", "hexagon_M2_vmac2s_s0", "hexagon_M2_vmac2s_s1", 
"hexagon_M2_vmac2su_s0", "hexagon_M2_vmac2su_s1", "hexagon_M2_vmpy2es_s0", 
"hexagon_M2_vmpy2es_s1", "hexagon_M2_vmpy2s_s0", "hexagon_M2_vmpy2s_s0pack", 
"hexagon_M2_vmpy2s_s1", "hexagon_M2_vmpy2s_s1pack", "hexagon_M2_vmpy2su_s0", 
"hexagon_M2_vmpy2su_s1", "hexagon_M2_vraddh", "hexagon_M2_vradduh", 
"hexagon_M2_vrcmaci_s0", "hexagon_M2_vrcmaci_s0c", "hexagon_M2_vrcmacr_s0", 
"hexagon_M2_vrcmacr_s0c", "hexagon_M2_vrcmpyi_s0", "hexagon_M2_vrcmpyi_s0c", 
"hexagon_M2_vrcmpyr_s0", "hexagon_M2_vrcmpyr_s0c", "hexagon_M2_vrcmpys_acc_s1", 
"hexagon_M2_vrcmpys_s1", "hexagon_M2_vrcmpys_s1rp", "hexagon_M2_vrmac_s0", 
"hexagon_M2_vrmpy_s0", "hexagon_M2_xor_xacc", "hexagon_M4_and_and", 
"hexagon_M4_and_andn", "hexagon_M4_and_or", "hexagon_M4_and_xor", 
"hexagon_M4_cmpyi_wh", "hexagon_M4_cmpyi_whc", "hexagon_M4_cmpyr_wh", 
"hexagon_M4_cmpyr_whc", "hexagon_M4_mac_up_s1_sat", "hexagon_M4_mpyri_addi", 
"hexagon_M4_mpyri_addr", "hexagon_M4_mpyri_addr_u2", "hexagon_M4_mpyrr_addi", 
"hexagon_M4_mpyrr_addr", "hexagon_M4_nac_up_s1_sat", "hexagon_M4_or_and", 
"hexagon_M4_or_andn", "hexagon_M4_or_or", "hexagon_M4_or_xor", 
"hexagon_M4_pmpyw", "hexagon_M4_pmpyw_acc", "hexagon_M4_vpmpyh", 
"hexagon_M4_vpmpyh_acc", "hexagon_M4_vrmpyeh_acc_s0", "hexagon_M4_vrmpyeh_acc_s1", 
"hexagon_M4_vrmpyeh_s0", "hexagon_M4_vrmpyeh_s1", "hexagon_M4_vrmpyoh_acc_s0", 
"hexagon_M4_vrmpyoh_acc_s1", "hexagon_M4_vrmpyoh_s0", "hexagon_M4_vrmpyoh_s1", 
"hexagon_M4_xor_and", "hexagon_M4_xor_andn", "hexagon_M4_xor_or", 
"hexagon_M4_xor_xacc", "hexagon_M5_vdmacbsu", "hexagon_M5_vdmpybsu", 
"hexagon_M5_vmacbsu", "hexagon_M5_vmacbuu", "hexagon_M5_vmpybsu", 
"hexagon_M5_vmpybuu", "hexagon_M5_vrmacbsu", "hexagon_M5_vrmacbuu", 
"hexagon_M5_vrmpybsu", "hexagon_M5_vrmpybuu", "hexagon_S2_addasl_rrri", 
"hexagon_S2_asl_i_p", "hexagon_S2_asl_i_p_acc", "hexagon_S2_asl_i_p_and", 
"hexagon_S2_asl_i_p_nac", "hexagon_S2_asl_i_p_or", "hexagon_S2_asl_i_p_xacc", 
"hexagon_S2_asl_i_r", "hexagon_S2_asl_i_r_acc", "hexagon_S2_asl_i_r_and", 
"hexagon_S2_asl_i_r_nac", "hexagon_S2_asl_i_r_or", "hexagon_S2_asl_i_r_sat", 
"hexagon_S2_asl_i_r_xacc", "hexagon_S2_asl_i_vh", "hexagon_S2_asl_i_vw", 
"hexagon_S2_asl_r_p", "hexagon_S2_asl_r_p_acc", "hexagon_S2_asl_r_p_and", 
"hexagon_S2_asl_r_p_nac", "hexagon_S2_asl_r_p_or", "hexagon_S2_asl_r_p_xor", 
"hexagon_S2_asl_r_r", "hexagon_S2_asl_r_r_acc", "hexagon_S2_asl_r_r_and", 
"hexagon_S2_asl_r_r_nac", "hexagon_S2_asl_r_r_or", "hexagon_S2_asl_r_r_sat", 
"hexagon_S2_asl_r_vh", "hexagon_S2_asl_r_vw", "hexagon_S2_asr_i_p", 
"hexagon_S2_asr_i_p_acc", "hexagon_S2_asr_i_p_and", "hexagon_S2_asr_i_p_nac", 
"hexagon_S2_asr_i_p_or", "hexagon_S2_asr_i_p_rnd", "hexagon_S2_asr_i_p_rnd_goodsyntax", 
"hexagon_S2_asr_i_r", "hexagon_S2_asr_i_r_acc", "hexagon_S2_asr_i_r_and", 
"hexagon_S2_asr_i_r_nac", "hexagon_S2_asr_i_r_or", "hexagon_S2_asr_i_r_rnd", 
"hexagon_S2_asr_i_r_rnd_goodsyntax", "hexagon_S2_asr_i_svw_trun", 
"hexagon_S2_asr_i_vh", "hexagon_S2_asr_i_vw", "hexagon_S2_asr_r_p", 
"hexagon_S2_asr_r_p_acc", "hexagon_S2_asr_r_p_and", "hexagon_S2_asr_r_p_nac", 
"hexagon_S2_asr_r_p_or", "hexagon_S2_asr_r_p_xor", "hexagon_S2_asr_r_r", 
"hexagon_S2_asr_r_r_acc", "hexagon_S2_asr_r_r_and", "hexagon_S2_asr_r_r_nac", 
"hexagon_S2_asr_r_r_or", "hexagon_S2_asr_r_r_sat", "hexagon_S2_asr_r_svw_trun", 
"hexagon_S2_asr_r_vh", "hexagon_S2_asr_r_vw", "hexagon_S2_brev", 
"hexagon_S2_brevp", "hexagon_S2_cl0", "hexagon_S2_cl0p", "hexagon_S2_cl1", 
"hexagon_S2_cl1p", "hexagon_S2_clb", "hexagon_S2_clbnorm", "hexagon_S2_clbp", 
"hexagon_S2_clrbit_i", "hexagon_S2_clrbit_r", "hexagon_S2_ct0", 
"hexagon_S2_ct0p", "hexagon_S2_ct1", "hexagon_S2_ct1p", "hexagon_S2_deinterleave", 
"hexagon_S2_extractu", "hexagon_S2_extractu_rp", "hexagon_S2_extractup", 
"hexagon_S2_extractup_rp", "hexagon_S2_insert", "hexagon_S2_insert_rp", 
"hexagon_S2_insertp", "hexagon_S2_insertp_rp", "hexagon_S2_interleave", 
"hexagon_S2_lfsp", "hexagon_S2_lsl_r_p", "hexagon_S2_lsl_r_p_acc", 
"hexagon_S2_lsl_r_p_and", "hexagon_S2_lsl_r_p_nac", "hexagon_S2_lsl_r_p_or", 
"hexagon_S2_lsl_r_p_xor", "hexagon_S2_lsl_r_r", "hexagon_S2_lsl_r_r_acc", 
"hexagon_S2_lsl_r_r_and", "hexagon_S2_lsl_r_r_nac", "hexagon_S2_lsl_r_r_or", 
"hexagon_S2_lsl_r_vh", "hexagon_S2_lsl_r_vw", "hexagon_S2_lsr_i_p", 
"hexagon_S2_lsr_i_p_acc", "hexagon_S2_lsr_i_p_and", "hexagon_S2_lsr_i_p_nac", 
"hexagon_S2_lsr_i_p_or", "hexagon_S2_lsr_i_p_xacc", "hexagon_S2_lsr_i_r", 
"hexagon_S2_lsr_i_r_acc", "hexagon_S2_lsr_i_r_and", "hexagon_S2_lsr_i_r_nac", 
"hexagon_S2_lsr_i_r_or", "hexagon_S2_lsr_i_r_xacc", "hexagon_S2_lsr_i_vh", 
"hexagon_S2_lsr_i_vw", "hexagon_S2_lsr_r_p", "hexagon_S2_lsr_r_p_acc", 
"hexagon_S2_lsr_r_p_and", "hexagon_S2_lsr_r_p_nac", "hexagon_S2_lsr_r_p_or", 
"hexagon_S2_lsr_r_p_xor", "hexagon_S2_lsr_r_r", "hexagon_S2_lsr_r_r_acc", 
"hexagon_S2_lsr_r_r_and", "hexagon_S2_lsr_r_r_nac", "hexagon_S2_lsr_r_r_or", 
"hexagon_S2_lsr_r_vh", "hexagon_S2_lsr_r_vw", "hexagon_S2_packhl", 
"hexagon_S2_parityp", "hexagon_S2_setbit_i", "hexagon_S2_setbit_r", 
"hexagon_S2_shuffeb", "hexagon_S2_shuffeh", "hexagon_S2_shuffob", 
"hexagon_S2_shuffoh", "hexagon_S2_svsathb", "hexagon_S2_svsathub", 
"hexagon_S2_tableidxb_goodsyntax", "hexagon_S2_tableidxd_goodsyntax", 
"hexagon_S2_tableidxh_goodsyntax", "hexagon_S2_tableidxw_goodsyntax", 
"hexagon_S2_togglebit_i", "hexagon_S2_togglebit_r", "hexagon_S2_tstbit_i", 
"hexagon_S2_tstbit_r", "hexagon_S2_valignib", "hexagon_S2_valignrb", 
"hexagon_S2_vcnegh", "hexagon_S2_vcrotate", "hexagon_S2_vrcnegh", 
"hexagon_S2_vrndpackwh", "hexagon_S2_vrndpackwhs", "hexagon_S2_vsathb", 
"hexagon_S2_vsathb_nopack", "hexagon_S2_vsathub", "hexagon_S2_vsathub_nopack", 
"hexagon_S2_vsatwh", "hexagon_S2_vsatwh_nopack", "hexagon_S2_vsatwuh", 
"hexagon_S2_vsatwuh_nopack", "hexagon_S2_vsplatrb", "hexagon_S2_vsplatrh", 
"hexagon_S2_vspliceib", "hexagon_S2_vsplicerb", "hexagon_S2_vsxtbh", 
"hexagon_S2_vsxthw", "hexagon_S2_vtrunehb", "hexagon_S2_vtrunewh", 
"hexagon_S2_vtrunohb", "hexagon_S2_vtrunowh", "hexagon_S2_vzxtbh", 
"hexagon_S2_vzxthw", "hexagon_S4_addaddi", "hexagon_S4_addi_asl_ri", 
"hexagon_S4_addi_lsr_ri", "hexagon_S4_andi_asl_ri", "hexagon_S4_andi_lsr_ri", 
"hexagon_S4_clbaddi", "hexagon_S4_clbpaddi", "hexagon_S4_clbpnorm", 
"hexagon_S4_extract", "hexagon_S4_extract_rp", "hexagon_S4_extractp", 
"hexagon_S4_extractp_rp", "hexagon_S4_lsli", "hexagon_S4_ntstbit_i", 
"hexagon_S4_ntstbit_r", "hexagon_S4_or_andi", "hexagon_S4_or_andix", 
"hexagon_S4_or_ori", "hexagon_S4_ori_asl_ri", "hexagon_S4_ori_lsr_ri", 
"hexagon_S4_parity", "hexagon_S4_subaddi", "hexagon_S4_subi_asl_ri", 
"hexagon_S4_subi_lsr_ri", "hexagon_S4_vrcrotate", "hexagon_S4_vrcrotate_acc", 
"hexagon_S4_vxaddsubh", "hexagon_S4_vxaddsubhr", "hexagon_S4_vxaddsubw", 
"hexagon_S4_vxsubaddh", "hexagon_S4_vxsubaddhr", "hexagon_S4_vxsubaddw", 
"hexagon_S5_asrhub_rnd_sat_goodsyntax", "hexagon_S5_asrhub_sat", 
"hexagon_S5_popcountp", "hexagon_S5_vasrhrnd_goodsyntax", "hexagon_SI_to_SXTHI_asrh", 
"hexagon_circ_ldd", "init_trampoline", "invariant_end", "invariant_start", 
"lifetime_end", "lifetime_start", "log", "log10", "log2", "longjmp", 
"memcpy", "memmove", "memset", "mips_absq_s_ph", "mips_absq_s_qb", 
"mips_absq_s_w", "mips_addq_ph", "mips_addq_s_ph", "mips_addq_s_w", 
"mips_addqh_ph", "mips_addqh_r_ph", "mips_addqh_r_w", "mips_addqh_w", 
"mips_addsc", "mips_addu_ph", "mips_addu_qb", "mips_addu_s_ph", 
"mips_addu_s_qb", "mips_adduh_qb", "mips_adduh_r_qb", "mips_addwc", 
"mips_append", "mips_balign", "mips_bitrev", "mips_bposge32", 
"mips_cmp_eq_ph", "mips_cmp_le_ph", "mips_cmp_lt_ph", "mips_cmpgdu_eq_qb", 
"mips_cmpgdu_le_qb", "mips_cmpgdu_lt_qb", "mips_cmpgu_eq_qb", 
"mips_cmpgu_le_qb", "mips_cmpgu_lt_qb", "mips_cmpu_eq_qb", "mips_cmpu_le_qb", 
"mips_cmpu_lt_qb", "mips_dpa_w_ph", "mips_dpaq_s_w_ph", "mips_dpaq_sa_l_w", 
"mips_dpaqx_s_w_ph", "mips_dpaqx_sa_w_ph", "mips_dpau_h_qbl", 
"mips_dpau_h_qbr", "mips_dpax_w_ph", "mips_dps_w_ph", "mips_dpsq_s_w_ph", 
"mips_dpsq_sa_l_w", "mips_dpsqx_s_w_ph", "mips_dpsqx_sa_w_ph", 
"mips_dpsu_h_qbl", "mips_dpsu_h_qbr", "mips_dpsx_w_ph", "mips_extp", 
"mips_extpdp", "mips_extr_r_w", "mips_extr_rs_w", "mips_extr_s_h", 
"mips_extr_w", "mips_insv", "mips_lbux", "mips_lhx", "mips_lwx", 
"mips_madd", "mips_maddu", "mips_maq_s_w_phl", "mips_maq_s_w_phr", 
"mips_maq_sa_w_phl", "mips_maq_sa_w_phr", "mips_modsub", "mips_msub", 
"mips_msubu", "mips_mthlip", "mips_mul_ph", "mips_mul_s_ph", 
"mips_muleq_s_w_phl", "mips_muleq_s_w_phr", "mips_muleu_s_ph_qbl", 
"mips_muleu_s_ph_qbr", "mips_mulq_rs_ph", "mips_mulq_rs_w", "mips_mulq_s_ph", 
"mips_mulq_s_w", "mips_mulsa_w_ph", "mips_mulsaq_s_w_ph", "mips_mult", 
"mips_multu", "mips_packrl_ph", "mips_pick_ph", "mips_pick_qb", 
"mips_preceq_w_phl", "mips_preceq_w_phr", "mips_precequ_ph_qbl", 
"mips_precequ_ph_qbla", "mips_precequ_ph_qbr", "mips_precequ_ph_qbra", 
"mips_preceu_ph_qbl", "mips_preceu_ph_qbla", "mips_preceu_ph_qbr", 
"mips_preceu_ph_qbra", "mips_precr_qb_ph", "mips_precr_sra_ph_w", 
"mips_precr_sra_r_ph_w", "mips_precrq_ph_w", "mips_precrq_qb_ph", 
"mips_precrq_rs_ph_w", "mips_precrqu_s_qb_ph", "mips_prepend", 
"mips_raddu_w_qb", "mips_rddsp", "mips_repl_ph", "mips_repl_qb", 
"mips_shilo", "mips_shll_ph", "mips_shll_qb", "mips_shll_s_ph", 
"mips_shll_s_w", "mips_shra_ph", "mips_shra_qb", "mips_shra_r_ph", 
"mips_shra_r_qb", "mips_shra_r_w", "mips_shrl_ph", "mips_shrl_qb", 
"mips_subq_ph", "mips_subq_s_ph", "mips_subq_s_w", "mips_subqh_ph", 
"mips_subqh_r_ph", "mips_subqh_r_w", "mips_subqh_w", "mips_subu_ph", 
"mips_subu_qb", "mips_subu_s_ph", "mips_subu_s_qb", "mips_subuh_qb", 
"mips_subuh_r_qb", "mips_wrdsp", "nvvm_abs_i", "nvvm_abs_ll", 
"nvvm_add_rm_d", "nvvm_add_rm_f", "nvvm_add_rm_ftz_f", "nvvm_add_rn_d", 
"nvvm_add_rn_f", "nvvm_add_rn_ftz_f", "nvvm_add_rp_d", "nvvm_add_rp_f", 
"nvvm_add_rp_ftz_f", "nvvm_add_rz_d", "nvvm_add_rz_f", "nvvm_add_rz_ftz_f", 
"nvvm_atomic_load_add_f32", "nvvm_atomic_load_dec_32", "nvvm_atomic_load_inc_32", 
"nvvm_barrier0", "nvvm_barrier0_and", "nvvm_barrier0_or", "nvvm_barrier0_popc", 
"nvvm_bitcast_d2ll", "nvvm_bitcast_f2i", "nvvm_bitcast_i2f", 
"nvvm_bitcast_ll2d", "nvvm_brev32", "nvvm_brev64", "nvvm_ceil_d", 
"nvvm_ceil_f", "nvvm_ceil_ftz_f", "nvvm_clz_i", "nvvm_clz_ll", 
"nvvm_compiler_error", "nvvm_compiler_warn", "nvvm_cos_approx_f", 
"nvvm_cos_approx_ftz_f", "nvvm_d2f_rm", "nvvm_d2f_rm_ftz", "nvvm_d2f_rn", 
"nvvm_d2f_rn_ftz", "nvvm_d2f_rp", "nvvm_d2f_rp_ftz", "nvvm_d2f_rz", 
"nvvm_d2f_rz_ftz", "nvvm_d2i_hi", "nvvm_d2i_lo", "nvvm_d2i_rm", 
"nvvm_d2i_rn", "nvvm_d2i_rp", "nvvm_d2i_rz", "nvvm_d2ll_rm", 
"nvvm_d2ll_rn", "nvvm_d2ll_rp", "nvvm_d2ll_rz", "nvvm_d2ui_rm", 
"nvvm_d2ui_rn", "nvvm_d2ui_rp", "nvvm_d2ui_rz", "nvvm_d2ull_rm", 
"nvvm_d2ull_rn", "nvvm_d2ull_rp", "nvvm_d2ull_rz", "nvvm_div_approx_f", 
"nvvm_div_approx_ftz_f", "nvvm_div_rm_d", "nvvm_div_rm_f", "nvvm_div_rm_ftz_f", 
"nvvm_div_rn_d", "nvvm_div_rn_f", "nvvm_div_rn_ftz_f", "nvvm_div_rp_d", 
"nvvm_div_rp_f", "nvvm_div_rp_ftz_f", "nvvm_div_rz_d", "nvvm_div_rz_f", 
"nvvm_div_rz_ftz_f", "nvvm_ex2_approx_d", "nvvm_ex2_approx_f", 
"nvvm_ex2_approx_ftz_f", "nvvm_f2h_rn", "nvvm_f2h_rn_ftz", "nvvm_f2i_rm", 
"nvvm_f2i_rm_ftz", "nvvm_f2i_rn", "nvvm_f2i_rn_ftz", "nvvm_f2i_rp", 
"nvvm_f2i_rp_ftz", "nvvm_f2i_rz", "nvvm_f2i_rz_ftz", "nvvm_f2ll_rm", 
"nvvm_f2ll_rm_ftz", "nvvm_f2ll_rn", "nvvm_f2ll_rn_ftz", "nvvm_f2ll_rp", 
"nvvm_f2ll_rp_ftz", "nvvm_f2ll_rz", "nvvm_f2ll_rz_ftz", "nvvm_f2ui_rm", 
"nvvm_f2ui_rm_ftz", "nvvm_f2ui_rn", "nvvm_f2ui_rn_ftz", "nvvm_f2ui_rp", 
"nvvm_f2ui_rp_ftz", "nvvm_f2ui_rz", "nvvm_f2ui_rz_ftz", "nvvm_f2ull_rm", 
"nvvm_f2ull_rm_ftz", "nvvm_f2ull_rn", "nvvm_f2ull_rn_ftz", "nvvm_f2ull_rp", 
"nvvm_f2ull_rp_ftz", "nvvm_f2ull_rz", "nvvm_f2ull_rz_ftz", "nvvm_fabs_d", 
"nvvm_fabs_f", "nvvm_fabs_ftz_f", "nvvm_floor_d", "nvvm_floor_f", 
"nvvm_floor_ftz_f", "nvvm_fma_rm_d", "nvvm_fma_rm_f", "nvvm_fma_rm_ftz_f", 
"nvvm_fma_rn_d", "nvvm_fma_rn_f", "nvvm_fma_rn_ftz_f", "nvvm_fma_rp_d", 
"nvvm_fma_rp_f", "nvvm_fma_rp_ftz_f", "nvvm_fma_rz_d", "nvvm_fma_rz_f", 
"nvvm_fma_rz_ftz_f", "nvvm_fmax_d", "nvvm_fmax_f", "nvvm_fmax_ftz_f", 
"nvvm_fmin_d", "nvvm_fmin_f", "nvvm_fmin_ftz_f", "nvvm_h2f", 
"nvvm_i2d_rm", "nvvm_i2d_rn", "nvvm_i2d_rp", "nvvm_i2d_rz", "nvvm_i2f_rm", 
"nvvm_i2f_rn", "nvvm_i2f_rp", "nvvm_i2f_rz", "nvvm_ldu_global_f", 
"nvvm_ldu_global_i", "nvvm_ldu_global_p", "nvvm_lg2_approx_d", 
"nvvm_lg2_approx_f", "nvvm_lg2_approx_ftz_f", "nvvm_ll2d_rm", 
"nvvm_ll2d_rn", "nvvm_ll2d_rp", "nvvm_ll2d_rz", "nvvm_ll2f_rm", 
"nvvm_ll2f_rn", "nvvm_ll2f_rp", "nvvm_ll2f_rz", "nvvm_lohi_i2d", 
"nvvm_max_i", "nvvm_max_ll", "nvvm_max_ui", "nvvm_max_ull", "nvvm_membar_cta", 
"nvvm_membar_gl", "nvvm_membar_sys", "nvvm_min_i", "nvvm_min_ll", 
"nvvm_min_ui", "nvvm_min_ull", "nvvm_move_double", "nvvm_move_float", 
"nvvm_move_i16", "nvvm_move_i32", "nvvm_move_i64", "nvvm_move_i8", 
"nvvm_move_ptr", "nvvm_mul24_i", "nvvm_mul24_ui", "nvvm_mul_rm_d", 
"nvvm_mul_rm_f", "nvvm_mul_rm_ftz_f", "nvvm_mul_rn_d", "nvvm_mul_rn_f", 
"nvvm_mul_rn_ftz_f", "nvvm_mul_rp_d", "nvvm_mul_rp_f", "nvvm_mul_rp_ftz_f", 
"nvvm_mul_rz_d", "nvvm_mul_rz_f", "nvvm_mul_rz_ftz_f", "nvvm_mulhi_i", 
"nvvm_mulhi_ll", "nvvm_mulhi_ui", "nvvm_mulhi_ull", "nvvm_popc_i", 
"nvvm_popc_ll", "nvvm_prmt", "nvvm_ptr_constant_to_gen", "nvvm_ptr_gen_to_constant", 
"nvvm_ptr_gen_to_global", "nvvm_ptr_gen_to_local", "nvvm_ptr_gen_to_param", 
"nvvm_ptr_gen_to_shared", "nvvm_ptr_global_to_gen", "nvvm_ptr_local_to_gen", 
"nvvm_ptr_shared_to_gen", "nvvm_rcp_approx_ftz_d", "nvvm_rcp_rm_d", 
"nvvm_rcp_rm_f", "nvvm_rcp_rm_ftz_f", "nvvm_rcp_rn_d", "nvvm_rcp_rn_f", 
"nvvm_rcp_rn_ftz_f", "nvvm_rcp_rp_d", "nvvm_rcp_rp_f", "nvvm_rcp_rp_ftz_f", 
"nvvm_rcp_rz_d", "nvvm_rcp_rz_f", "nvvm_rcp_rz_ftz_f", "nvvm_read_ptx_sreg_ctaid_x", 
"nvvm_read_ptx_sreg_ctaid_y", "nvvm_read_ptx_sreg_ctaid_z", "nvvm_read_ptx_sreg_nctaid_x", 
"nvvm_read_ptx_sreg_nctaid_y", "nvvm_read_ptx_sreg_nctaid_z", 
"nvvm_read_ptx_sreg_ntid_x", "nvvm_read_ptx_sreg_ntid_y", "nvvm_read_ptx_sreg_ntid_z", 
"nvvm_read_ptx_sreg_tid_x", "nvvm_read_ptx_sreg_tid_y", "nvvm_read_ptx_sreg_tid_z", 
"nvvm_read_ptx_sreg_warpsize", "nvvm_round_d", "nvvm_round_f", 
"nvvm_round_ftz_f", "nvvm_rsqrt_approx_d", "nvvm_rsqrt_approx_f", 
"nvvm_rsqrt_approx_ftz_f", "nvvm_sad_i", "nvvm_sad_ui", "nvvm_saturate_d", 
"nvvm_saturate_f", "nvvm_saturate_ftz_f", "nvvm_sin_approx_f", 
"nvvm_sin_approx_ftz_f", "nvvm_sqrt_approx_f", "nvvm_sqrt_approx_ftz_f", 
"nvvm_sqrt_rm_d", "nvvm_sqrt_rm_f", "nvvm_sqrt_rm_ftz_f", "nvvm_sqrt_rn_d", 
"nvvm_sqrt_rn_f", "nvvm_sqrt_rn_ftz_f", "nvvm_sqrt_rp_d", "nvvm_sqrt_rp_f", 
"nvvm_sqrt_rp_ftz_f", "nvvm_sqrt_rz_d", "nvvm_sqrt_rz_f", "nvvm_sqrt_rz_ftz_f", 
"nvvm_trunc_d", "nvvm_trunc_f", "nvvm_trunc_ftz_f", "nvvm_ui2d_rm", 
"nvvm_ui2d_rn", "nvvm_ui2d_rp", "nvvm_ui2d_rz", "nvvm_ui2f_rm", 
"nvvm_ui2f_rn", "nvvm_ui2f_rp", "nvvm_ui2f_rz", "nvvm_ull2d_rm", 
"nvvm_ull2d_rn", "nvvm_ull2d_rp", "nvvm_ull2d_rz", "nvvm_ull2f_rm", 
"nvvm_ull2f_rn", "nvvm_ull2f_rp", "nvvm_ull2f_rz", "objectsize", 
"pcmarker", "pow", "powi", "ppc_altivec_dss", "ppc_altivec_dssall", 
"ppc_altivec_dst", "ppc_altivec_dstst", "ppc_altivec_dststt", 
"ppc_altivec_dstt", "ppc_altivec_lvebx", "ppc_altivec_lvehx", 
"ppc_altivec_lvewx", "ppc_altivec_lvsl", "ppc_altivec_lvsr", 
"ppc_altivec_lvx", "ppc_altivec_lvxl", "ppc_altivec_mfvscr", 
"ppc_altivec_mtvscr", "ppc_altivec_stvebx", "ppc_altivec_stvehx", 
"ppc_altivec_stvewx", "ppc_altivec_stvx", "ppc_altivec_stvxl", 
"ppc_altivec_vaddcuw", "ppc_altivec_vaddsbs", "ppc_altivec_vaddshs", 
"ppc_altivec_vaddsws", "ppc_altivec_vaddubs", "ppc_altivec_vadduhs", 
"ppc_altivec_vadduws", "ppc_altivec_vavgsb", "ppc_altivec_vavgsh", 
"ppc_altivec_vavgsw", "ppc_altivec_vavgub", "ppc_altivec_vavguh", 
"ppc_altivec_vavguw", "ppc_altivec_vcfsx", "ppc_altivec_vcfux", 
"ppc_altivec_vcmpbfp", "ppc_altivec_vcmpbfp_p", "ppc_altivec_vcmpeqfp", 
"ppc_altivec_vcmpeqfp_p", "ppc_altivec_vcmpequb", "ppc_altivec_vcmpequb_p", 
"ppc_altivec_vcmpequh", "ppc_altivec_vcmpequh_p", "ppc_altivec_vcmpequw", 
"ppc_altivec_vcmpequw_p", "ppc_altivec_vcmpgefp", "ppc_altivec_vcmpgefp_p", 
"ppc_altivec_vcmpgtfp", "ppc_altivec_vcmpgtfp_p", "ppc_altivec_vcmpgtsb", 
"ppc_altivec_vcmpgtsb_p", "ppc_altivec_vcmpgtsh", "ppc_altivec_vcmpgtsh_p", 
"ppc_altivec_vcmpgtsw", "ppc_altivec_vcmpgtsw_p", "ppc_altivec_vcmpgtub", 
"ppc_altivec_vcmpgtub_p", "ppc_altivec_vcmpgtuh", "ppc_altivec_vcmpgtuh_p", 
"ppc_altivec_vcmpgtuw", "ppc_altivec_vcmpgtuw_p", "ppc_altivec_vctsxs", 
"ppc_altivec_vctuxs", "ppc_altivec_vexptefp", "ppc_altivec_vlogefp", 
"ppc_altivec_vmaddfp", "ppc_altivec_vmaxfp", "ppc_altivec_vmaxsb", 
"ppc_altivec_vmaxsh", "ppc_altivec_vmaxsw", "ppc_altivec_vmaxub", 
"ppc_altivec_vmaxuh", "ppc_altivec_vmaxuw", "ppc_altivec_vmhaddshs", 
"ppc_altivec_vmhraddshs", "ppc_altivec_vminfp", "ppc_altivec_vminsb", 
"ppc_altivec_vminsh", "ppc_altivec_vminsw", "ppc_altivec_vminub", 
"ppc_altivec_vminuh", "ppc_altivec_vminuw", "ppc_altivec_vmladduhm", 
"ppc_altivec_vmsummbm", "ppc_altivec_vmsumshm", "ppc_altivec_vmsumshs", 
"ppc_altivec_vmsumubm", "ppc_altivec_vmsumuhm", "ppc_altivec_vmsumuhs", 
"ppc_altivec_vmulesb", "ppc_altivec_vmulesh", "ppc_altivec_vmuleub", 
"ppc_altivec_vmuleuh", "ppc_altivec_vmulosb", "ppc_altivec_vmulosh", 
"ppc_altivec_vmuloub", "ppc_altivec_vmulouh", "ppc_altivec_vnmsubfp", 
"ppc_altivec_vperm", "ppc_altivec_vpkpx", "ppc_altivec_vpkshss", 
"ppc_altivec_vpkshus", "ppc_altivec_vpkswss", "ppc_altivec_vpkswus", 
"ppc_altivec_vpkuhus", "ppc_altivec_vpkuwus", "ppc_altivec_vrefp", 
"ppc_altivec_vrfim", "ppc_altivec_vrfin", "ppc_altivec_vrfip", 
"ppc_altivec_vrfiz", "ppc_altivec_vrlb", "ppc_altivec_vrlh", 
"ppc_altivec_vrlw", "ppc_altivec_vrsqrtefp", "ppc_altivec_vsel", 
"ppc_altivec_vsl", "ppc_altivec_vslb", "ppc_altivec_vslh", "ppc_altivec_vslo", 
"ppc_altivec_vslw", "ppc_altivec_vsr", "ppc_altivec_vsrab", "ppc_altivec_vsrah", 
"ppc_altivec_vsraw", "ppc_altivec_vsrb", "ppc_altivec_vsrh", 
"ppc_altivec_vsro", "ppc_altivec_vsrw", "ppc_altivec_vsubcuw", 
"ppc_altivec_vsubsbs", "ppc_altivec_vsubshs", "ppc_altivec_vsubsws", 
"ppc_altivec_vsububs", "ppc_altivec_vsubuhs", "ppc_altivec_vsubuws", 
"ppc_altivec_vsum2sws", "ppc_altivec_vsum4sbs", "ppc_altivec_vsum4shs", 
"ppc_altivec_vsum4ubs", "ppc_altivec_vsumsws", "ppc_altivec_vupkhpx", 
"ppc_altivec_vupkhsb", "ppc_altivec_vupkhsh", "ppc_altivec_vupklpx", 
"ppc_altivec_vupklsb", "ppc_altivec_vupklsh", "ppc_dcba", "ppc_dcbf", 
"ppc_dcbi", "ppc_dcbst", "ppc_dcbt", "ppc_dcbtst", "ppc_dcbz", 
"ppc_dcbzl", "ppc_sync", "prefetch", "ptr_annotation", "ptx_bar_sync", 
"ptx_read_clock", "ptx_read_clock64", "ptx_read_ctaid_w", "ptx_read_ctaid_x", 
"ptx_read_ctaid_y", "ptx_read_ctaid_z", "ptx_read_gridid", "ptx_read_laneid", 
"ptx_read_lanemask_eq", "ptx_read_lanemask_ge", "ptx_read_lanemask_gt", 
"ptx_read_lanemask_le", "ptx_read_lanemask_lt", "ptx_read_nctaid_w", 
"ptx_read_nctaid_x", "ptx_read_nctaid_y", "ptx_read_nctaid_z", 
"ptx_read_nsmid", "ptx_read_ntid_w", "ptx_read_ntid_x", "ptx_read_ntid_y", 
"ptx_read_ntid_z", "ptx_read_nwarpid", "ptx_read_pm0", "ptx_read_pm1", 
"ptx_read_pm2", "ptx_read_pm3", "ptx_read_smid", "ptx_read_tid_w", 
"ptx_read_tid_x", "ptx_read_tid_y", "ptx_read_tid_z", "ptx_read_warpid", 
"readcyclecounter", "returnaddress", "sadd_with_overflow", "setjmp", 
"siglongjmp", "sigsetjmp", "sin", "smul_with_overflow", "spu_si_a", 
"spu_si_addx", "spu_si_ah", "spu_si_ahi", "spu_si_ai", "spu_si_and", 
"spu_si_andbi", "spu_si_andc", "spu_si_andhi", "spu_si_andi", 
"spu_si_bg", "spu_si_bgx", "spu_si_ceq", "spu_si_ceqb", "spu_si_ceqbi", 
"spu_si_ceqh", "spu_si_ceqhi", "spu_si_ceqi", "spu_si_cg", "spu_si_cgt", 
"spu_si_cgtb", "spu_si_cgtbi", "spu_si_cgth", "spu_si_cgthi", 
"spu_si_cgti", "spu_si_cgx", "spu_si_clgt", "spu_si_clgtb", "spu_si_clgtbi", 
"spu_si_clgth", "spu_si_clgthi", "spu_si_clgti", "spu_si_dfa", 
"spu_si_dfm", "spu_si_dfma", "spu_si_dfms", "spu_si_dfnma", "spu_si_dfnms", 
"spu_si_dfs", "spu_si_fa", "spu_si_fceq", "spu_si_fcgt", "spu_si_fcmeq", 
"spu_si_fcmgt", "spu_si_fm", "spu_si_fma", "spu_si_fms", "spu_si_fnms", 
"spu_si_fs", "spu_si_fsmbi", "spu_si_mpy", "spu_si_mpya", "spu_si_mpyh", 
"spu_si_mpyhh", "spu_si_mpyhha", "spu_si_mpyhhau", "spu_si_mpyhhu", 
"spu_si_mpyi", "spu_si_mpys", "spu_si_mpyu", "spu_si_mpyui", 
"spu_si_nand", "spu_si_nor", "spu_si_or", "spu_si_orbi", "spu_si_orc", 
"spu_si_orhi", "spu_si_ori", "spu_si_sf", "spu_si_sfh", "spu_si_sfhi", 
"spu_si_sfi", "spu_si_sfx", "spu_si_shli", "spu_si_shlqbi", "spu_si_shlqbii", 
"spu_si_shlqby", "spu_si_shlqbyi", "spu_si_xor", "spu_si_xorbi", 
"spu_si_xorhi", "spu_si_xori", "sqrt", "ssub_with_overflow", 
"stackprotector", "stackrestore", "stacksave", "trap", "uadd_with_overflow", 
"umul_with_overflow", "usub_with_overflow", "vacopy", "vaend", 
"var_annotation", "vastart", "x86_3dnow_pavgusb", "x86_3dnow_pf2id", 
"x86_3dnow_pfacc", "x86_3dnow_pfadd", "x86_3dnow_pfcmpeq", "x86_3dnow_pfcmpge", 
"x86_3dnow_pfcmpgt", "x86_3dnow_pfmax", "x86_3dnow_pfmin", "x86_3dnow_pfmul", 
"x86_3dnow_pfrcp", "x86_3dnow_pfrcpit1", "x86_3dnow_pfrcpit2", 
"x86_3dnow_pfrsqit1", "x86_3dnow_pfrsqrt", "x86_3dnow_pfsub", 
"x86_3dnow_pfsubr", "x86_3dnow_pi2fd", "x86_3dnow_pmulhrw", "x86_3dnowa_pf2iw", 
"x86_3dnowa_pfnacc", "x86_3dnowa_pfpnacc", "x86_3dnowa_pi2fw", 
"x86_3dnowa_pswapd", "x86_aesni_aesdec", "x86_aesni_aesdeclast", 
"x86_aesni_aesenc", "x86_aesni_aesenclast", "x86_aesni_aesimc", 
"x86_aesni_aeskeygenassist", "x86_avx2_gather_d_d", "x86_avx2_gather_d_d_256", 
"x86_avx2_gather_d_pd", "x86_avx2_gather_d_pd_256", "x86_avx2_gather_d_ps", 
"x86_avx2_gather_d_ps_256", "x86_avx2_gather_d_q", "x86_avx2_gather_d_q_256", 
"x86_avx2_gather_q_d", "x86_avx2_gather_q_d_256", "x86_avx2_gather_q_pd", 
"x86_avx2_gather_q_pd_256", "x86_avx2_gather_q_ps", "x86_avx2_gather_q_ps_256", 
"x86_avx2_gather_q_q", "x86_avx2_gather_q_q_256", "x86_avx2_maskload_d", 
"x86_avx2_maskload_d_256", "x86_avx2_maskload_q", "x86_avx2_maskload_q_256", 
"x86_avx2_maskstore_d", "x86_avx2_maskstore_d_256", "x86_avx2_maskstore_q", 
"x86_avx2_maskstore_q_256", "x86_avx2_movntdqa", "x86_avx2_mpsadbw", 
"x86_avx2_pabs_b", "x86_avx2_pabs_d", "x86_avx2_pabs_w", "x86_avx2_packssdw", 
"x86_avx2_packsswb", "x86_avx2_packusdw", "x86_avx2_packuswb", 
"x86_avx2_padds_b", "x86_avx2_padds_w", "x86_avx2_paddus_b", 
"x86_avx2_paddus_w", "x86_avx2_pavg_b", "x86_avx2_pavg_w", "x86_avx2_pblendd_128", 
"x86_avx2_pblendd_256", "x86_avx2_pblendvb", "x86_avx2_pblendw", 
"x86_avx2_pbroadcastb_128", "x86_avx2_pbroadcastb_256", "x86_avx2_pbroadcastd_128", 
"x86_avx2_pbroadcastd_256", "x86_avx2_pbroadcastq_128", "x86_avx2_pbroadcastq_256", 
"x86_avx2_pbroadcastw_128", "x86_avx2_pbroadcastw_256", "x86_avx2_permd", 
"x86_avx2_permps", "x86_avx2_phadd_d", "x86_avx2_phadd_sw", "x86_avx2_phadd_w", 
"x86_avx2_phsub_d", "x86_avx2_phsub_sw", "x86_avx2_phsub_w", 
"x86_avx2_pmadd_ub_sw", "x86_avx2_pmadd_wd", "x86_avx2_pmaxs_b", 
"x86_avx2_pmaxs_d", "x86_avx2_pmaxs_w", "x86_avx2_pmaxu_b", "x86_avx2_pmaxu_d", 
"x86_avx2_pmaxu_w", "x86_avx2_pmins_b", "x86_avx2_pmins_d", "x86_avx2_pmins_w", 
"x86_avx2_pminu_b", "x86_avx2_pminu_d", "x86_avx2_pminu_w", "x86_avx2_pmovmskb", 
"x86_avx2_pmovsxbd", "x86_avx2_pmovsxbq", "x86_avx2_pmovsxbw", 
"x86_avx2_pmovsxdq", "x86_avx2_pmovsxwd", "x86_avx2_pmovsxwq", 
"x86_avx2_pmovzxbd", "x86_avx2_pmovzxbq", "x86_avx2_pmovzxbw", 
"x86_avx2_pmovzxdq", "x86_avx2_pmovzxwd", "x86_avx2_pmovzxwq", 
"x86_avx2_pmul_dq", "x86_avx2_pmul_hr_sw", "x86_avx2_pmulh_w", 
"x86_avx2_pmulhu_w", "x86_avx2_pmulu_dq", "x86_avx2_psad_bw", 
"x86_avx2_pshuf_b", "x86_avx2_psign_b", "x86_avx2_psign_d", "x86_avx2_psign_w", 
"x86_avx2_psll_d", "x86_avx2_psll_dq", "x86_avx2_psll_dq_bs", 
"x86_avx2_psll_q", "x86_avx2_psll_w", "x86_avx2_pslli_d", "x86_avx2_pslli_q", 
"x86_avx2_pslli_w", "x86_avx2_psllv_d", "x86_avx2_psllv_d_256", 
"x86_avx2_psllv_q", "x86_avx2_psllv_q_256", "x86_avx2_psra_d", 
"x86_avx2_psra_w", "x86_avx2_psrai_d", "x86_avx2_psrai_w", "x86_avx2_psrav_d", 
"x86_avx2_psrav_d_256", "x86_avx2_psrl_d", "x86_avx2_psrl_dq", 
"x86_avx2_psrl_dq_bs", "x86_avx2_psrl_q", "x86_avx2_psrl_w", 
"x86_avx2_psrli_d", "x86_avx2_psrli_q", "x86_avx2_psrli_w", "x86_avx2_psrlv_d", 
"x86_avx2_psrlv_d_256", "x86_avx2_psrlv_q", "x86_avx2_psrlv_q_256", 
"x86_avx2_psubs_b", "x86_avx2_psubs_w", "x86_avx2_psubus_b", 
"x86_avx2_psubus_w", "x86_avx2_vbroadcast_sd_pd_256", "x86_avx2_vbroadcast_ss_ps", 
"x86_avx2_vbroadcast_ss_ps_256", "x86_avx2_vbroadcasti128", "x86_avx2_vextracti128", 
"x86_avx2_vinserti128", "x86_avx2_vperm2i128", "x86_avx_addsub_pd_256", 
"x86_avx_addsub_ps_256", "x86_avx_blend_pd_256", "x86_avx_blend_ps_256", 
"x86_avx_blendv_pd_256", "x86_avx_blendv_ps_256", "x86_avx_cmp_pd_256", 
"x86_avx_cmp_ps_256", "x86_avx_cvt_pd2_ps_256", "x86_avx_cvt_pd2dq_256", 
"x86_avx_cvt_ps2_pd_256", "x86_avx_cvt_ps2dq_256", "x86_avx_cvtdq2_pd_256", 
"x86_avx_cvtdq2_ps_256", "x86_avx_cvtt_pd2dq_256", "x86_avx_cvtt_ps2dq_256", 
"x86_avx_dp_ps_256", "x86_avx_hadd_pd_256", "x86_avx_hadd_ps_256", 
"x86_avx_hsub_pd_256", "x86_avx_hsub_ps_256", "x86_avx_ldu_dq_256", 
"x86_avx_maskload_pd", "x86_avx_maskload_pd_256", "x86_avx_maskload_ps", 
"x86_avx_maskload_ps_256", "x86_avx_maskstore_pd", "x86_avx_maskstore_pd_256", 
"x86_avx_maskstore_ps", "x86_avx_maskstore_ps_256", "x86_avx_max_pd_256", 
"x86_avx_max_ps_256", "x86_avx_min_pd_256", "x86_avx_min_ps_256", 
"x86_avx_movmsk_pd_256", "x86_avx_movmsk_ps_256", "x86_avx_ptestc_256", 
"x86_avx_ptestnzc_256", "x86_avx_ptestz_256", "x86_avx_rcp_ps_256", 
"x86_avx_round_pd_256", "x86_avx_round_ps_256", "x86_avx_rsqrt_ps_256", 
"x86_avx_sqrt_pd_256", "x86_avx_sqrt_ps_256", "x86_avx_storeu_dq_256", 
"x86_avx_storeu_pd_256", "x86_avx_storeu_ps_256", "x86_avx_vbroadcast_sd_256", 
"x86_avx_vbroadcast_ss", "x86_avx_vbroadcast_ss_256", "x86_avx_vbroadcastf128_pd_256", 
"x86_avx_vbroadcastf128_ps_256", "x86_avx_vextractf128_pd_256", 
"x86_avx_vextractf128_ps_256", "x86_avx_vextractf128_si_256", 
"x86_avx_vinsertf128_pd_256", "x86_avx_vinsertf128_ps_256", "x86_avx_vinsertf128_si_256", 
"x86_avx_vperm2f128_pd_256", "x86_avx_vperm2f128_ps_256", "x86_avx_vperm2f128_si_256", 
"x86_avx_vpermilvar_pd", "x86_avx_vpermilvar_pd_256", "x86_avx_vpermilvar_ps", 
"x86_avx_vpermilvar_ps_256", "x86_avx_vtestc_pd", "x86_avx_vtestc_pd_256", 
"x86_avx_vtestc_ps", "x86_avx_vtestc_ps_256", "x86_avx_vtestnzc_pd", 
"x86_avx_vtestnzc_pd_256", "x86_avx_vtestnzc_ps", "x86_avx_vtestnzc_ps_256", 
"x86_avx_vtestz_pd", "x86_avx_vtestz_pd_256", "x86_avx_vtestz_ps", 
"x86_avx_vtestz_ps_256", "x86_avx_vzeroall", "x86_avx_vzeroupper", 
"x86_bmi_bextr_32", "x86_bmi_bextr_64", "x86_bmi_bzhi_32", "x86_bmi_bzhi_64", 
"x86_bmi_pdep_32", "x86_bmi_pdep_64", "x86_bmi_pext_32", "x86_bmi_pext_64", 
"x86_fma_vfmadd_pd", "x86_fma_vfmadd_pd_256", "x86_fma_vfmadd_ps", 
"x86_fma_vfmadd_ps_256", "x86_fma_vfmadd_sd", "x86_fma_vfmadd_ss", 
"x86_fma_vfmaddsub_pd", "x86_fma_vfmaddsub_pd_256", "x86_fma_vfmaddsub_ps", 
"x86_fma_vfmaddsub_ps_256", "x86_fma_vfmsub_pd", "x86_fma_vfmsub_pd_256", 
"x86_fma_vfmsub_ps", "x86_fma_vfmsub_ps_256", "x86_fma_vfmsub_sd", 
"x86_fma_vfmsub_ss", "x86_fma_vfmsubadd_pd", "x86_fma_vfmsubadd_pd_256", 
"x86_fma_vfmsubadd_ps", "x86_fma_vfmsubadd_ps_256", "x86_fma_vfnmadd_pd", 
"x86_fma_vfnmadd_pd_256", "x86_fma_vfnmadd_ps", "x86_fma_vfnmadd_ps_256", 
"x86_fma_vfnmadd_sd", "x86_fma_vfnmadd_ss", "x86_fma_vfnmsub_pd", 
"x86_fma_vfnmsub_pd_256", "x86_fma_vfnmsub_ps", "x86_fma_vfnmsub_ps_256", 
"x86_fma_vfnmsub_sd", "x86_fma_vfnmsub_ss", "x86_int", "x86_mmx_emms", 
"x86_mmx_femms", "x86_mmx_maskmovq", "x86_mmx_movnt_dq", "x86_mmx_packssdw", 
"x86_mmx_packsswb", "x86_mmx_packuswb", "x86_mmx_padd_b", "x86_mmx_padd_d", 
"x86_mmx_padd_q", "x86_mmx_padd_w", "x86_mmx_padds_b", "x86_mmx_padds_w", 
"x86_mmx_paddus_b", "x86_mmx_paddus_w", "x86_mmx_palignr_b", 
"x86_mmx_pand", "x86_mmx_pandn", "x86_mmx_pavg_b", "x86_mmx_pavg_w", 
"x86_mmx_pcmpeq_b", "x86_mmx_pcmpeq_d", "x86_mmx_pcmpeq_w", "x86_mmx_pcmpgt_b", 
"x86_mmx_pcmpgt_d", "x86_mmx_pcmpgt_w", "x86_mmx_pextr_w", "x86_mmx_pinsr_w", 
"x86_mmx_pmadd_wd", "x86_mmx_pmaxs_w", "x86_mmx_pmaxu_b", "x86_mmx_pmins_w", 
"x86_mmx_pminu_b", "x86_mmx_pmovmskb", "x86_mmx_pmulh_w", "x86_mmx_pmulhu_w", 
"x86_mmx_pmull_w", "x86_mmx_pmulu_dq", "x86_mmx_por", "x86_mmx_psad_bw", 
"x86_mmx_psll_d", "x86_mmx_psll_q", "x86_mmx_psll_w", "x86_mmx_pslli_d", 
"x86_mmx_pslli_q", "x86_mmx_pslli_w", "x86_mmx_psra_d", "x86_mmx_psra_w", 
"x86_mmx_psrai_d", "x86_mmx_psrai_w", "x86_mmx_psrl_d", "x86_mmx_psrl_q", 
"x86_mmx_psrl_w", "x86_mmx_psrli_d", "x86_mmx_psrli_q", "x86_mmx_psrli_w", 
"x86_mmx_psub_b", "x86_mmx_psub_d", "x86_mmx_psub_q", "x86_mmx_psub_w", 
"x86_mmx_psubs_b", "x86_mmx_psubs_w", "x86_mmx_psubus_b", "x86_mmx_psubus_w", 
"x86_mmx_punpckhbw", "x86_mmx_punpckhdq", "x86_mmx_punpckhwd", 
"x86_mmx_punpcklbw", "x86_mmx_punpckldq", "x86_mmx_punpcklwd", 
"x86_mmx_pxor", "x86_pclmulqdq", "x86_rdfsbase_32", "x86_rdfsbase_64", 
"x86_rdgsbase_32", "x86_rdgsbase_64", "x86_rdrand_16", "x86_rdrand_32", 
"x86_rdrand_64", "x86_sse2_add_sd", "x86_sse2_clflush", "x86_sse2_cmp_pd", 
"x86_sse2_cmp_sd", "x86_sse2_comieq_sd", "x86_sse2_comige_sd", 
"x86_sse2_comigt_sd", "x86_sse2_comile_sd", "x86_sse2_comilt_sd", 
"x86_sse2_comineq_sd", "x86_sse2_cvtdq2pd", "x86_sse2_cvtdq2ps", 
"x86_sse2_cvtpd2dq", "x86_sse2_cvtpd2ps", "x86_sse2_cvtps2dq", 
"x86_sse2_cvtps2pd", "x86_sse2_cvtsd2si", "x86_sse2_cvtsd2si64", 
"x86_sse2_cvtsd2ss", "x86_sse2_cvtsi2sd", "x86_sse2_cvtsi642sd", 
"x86_sse2_cvtss2sd", "x86_sse2_cvttpd2dq", "x86_sse2_cvttps2dq", 
"x86_sse2_cvttsd2si", "x86_sse2_cvttsd2si64", "x86_sse2_div_sd", 
"x86_sse2_lfence", "x86_sse2_maskmov_dqu", "x86_sse2_max_pd", 
"x86_sse2_max_sd", "x86_sse2_mfence", "x86_sse2_min_pd", "x86_sse2_min_sd", 
"x86_sse2_movmsk_pd", "x86_sse2_mul_sd", "x86_sse2_packssdw_128", 
"x86_sse2_packsswb_128", "x86_sse2_packuswb_128", "x86_sse2_padds_b", 
"x86_sse2_padds_w", "x86_sse2_paddus_b", "x86_sse2_paddus_w", 
"x86_sse2_pavg_b", "x86_sse2_pavg_w", "x86_sse2_pmadd_wd", "x86_sse2_pmaxs_w", 
"x86_sse2_pmaxu_b", "x86_sse2_pmins_w", "x86_sse2_pminu_b", "x86_sse2_pmovmskb_128", 
"x86_sse2_pmulh_w", "x86_sse2_pmulhu_w", "x86_sse2_pmulu_dq", 
"x86_sse2_psad_bw", "x86_sse2_psll_d", "x86_sse2_psll_dq", "x86_sse2_psll_dq_bs", 
"x86_sse2_psll_q", "x86_sse2_psll_w", "x86_sse2_pslli_d", "x86_sse2_pslli_q", 
"x86_sse2_pslli_w", "x86_sse2_psra_d", "x86_sse2_psra_w", "x86_sse2_psrai_d", 
"x86_sse2_psrai_w", "x86_sse2_psrl_d", "x86_sse2_psrl_dq", "x86_sse2_psrl_dq_bs", 
"x86_sse2_psrl_q", "x86_sse2_psrl_w", "x86_sse2_psrli_d", "x86_sse2_psrli_q", 
"x86_sse2_psrli_w", "x86_sse2_psubs_b", "x86_sse2_psubs_w", "x86_sse2_psubus_b", 
"x86_sse2_psubus_w", "x86_sse2_sqrt_pd", "x86_sse2_sqrt_sd", 
"x86_sse2_storel_dq", "x86_sse2_storeu_dq", "x86_sse2_storeu_pd", 
"x86_sse2_sub_sd", "x86_sse2_ucomieq_sd", "x86_sse2_ucomige_sd", 
"x86_sse2_ucomigt_sd", "x86_sse2_ucomile_sd", "x86_sse2_ucomilt_sd", 
"x86_sse2_ucomineq_sd", "x86_sse3_addsub_pd", "x86_sse3_addsub_ps", 
"x86_sse3_hadd_pd", "x86_sse3_hadd_ps", "x86_sse3_hsub_pd", "x86_sse3_hsub_ps", 
"x86_sse3_ldu_dq", "x86_sse3_monitor", "x86_sse3_mwait", "x86_sse41_blendpd", 
"x86_sse41_blendps", "x86_sse41_blendvpd", "x86_sse41_blendvps", 
"x86_sse41_dppd", "x86_sse41_dpps", "x86_sse41_extractps", "x86_sse41_insertps", 
"x86_sse41_movntdqa", "x86_sse41_mpsadbw", "x86_sse41_packusdw", 
"x86_sse41_pblendvb", "x86_sse41_pblendw", "x86_sse41_pextrb", 
"x86_sse41_pextrd", "x86_sse41_pextrq", "x86_sse41_phminposuw", 
"x86_sse41_pmaxsb", "x86_sse41_pmaxsd", "x86_sse41_pmaxud", "x86_sse41_pmaxuw", 
"x86_sse41_pminsb", "x86_sse41_pminsd", "x86_sse41_pminud", "x86_sse41_pminuw", 
"x86_sse41_pmovsxbd", "x86_sse41_pmovsxbq", "x86_sse41_pmovsxbw", 
"x86_sse41_pmovsxdq", "x86_sse41_pmovsxwd", "x86_sse41_pmovsxwq", 
"x86_sse41_pmovzxbd", "x86_sse41_pmovzxbq", "x86_sse41_pmovzxbw", 
"x86_sse41_pmovzxdq", "x86_sse41_pmovzxwd", "x86_sse41_pmovzxwq", 
"x86_sse41_pmuldq", "x86_sse41_ptestc", "x86_sse41_ptestnzc", 
"x86_sse41_ptestz", "x86_sse41_round_pd", "x86_sse41_round_ps", 
"x86_sse41_round_sd", "x86_sse41_round_ss", "x86_sse42_crc32_32_16", 
"x86_sse42_crc32_32_32", "x86_sse42_crc32_32_8", "x86_sse42_crc32_64_64", 
"x86_sse42_crc32_64_8", "x86_sse42_pcmpestri128", "x86_sse42_pcmpestria128", 
"x86_sse42_pcmpestric128", "x86_sse42_pcmpestrio128", "x86_sse42_pcmpestris128", 
"x86_sse42_pcmpestriz128", "x86_sse42_pcmpestrm128", "x86_sse42_pcmpistri128", 
"x86_sse42_pcmpistria128", "x86_sse42_pcmpistric128", "x86_sse42_pcmpistrio128", 
"x86_sse42_pcmpistris128", "x86_sse42_pcmpistriz128", "x86_sse42_pcmpistrm128", 
"x86_sse4a_extrq", "x86_sse4a_extrqi", "x86_sse4a_insertq", "x86_sse4a_insertqi", 
"x86_sse4a_movnt_sd", "x86_sse4a_movnt_ss", "x86_sse_add_ss", 
"x86_sse_cmp_ps", "x86_sse_cmp_ss", "x86_sse_comieq_ss", "x86_sse_comige_ss", 
"x86_sse_comigt_ss", "x86_sse_comile_ss", "x86_sse_comilt_ss", 
"x86_sse_comineq_ss", "x86_sse_cvtpd2pi", "x86_sse_cvtpi2pd", 
"x86_sse_cvtpi2ps", "x86_sse_cvtps2pi", "x86_sse_cvtsi2ss", "x86_sse_cvtsi642ss", 
"x86_sse_cvtss2si", "x86_sse_cvtss2si64", "x86_sse_cvttpd2pi", 
"x86_sse_cvttps2pi", "x86_sse_cvttss2si", "x86_sse_cvttss2si64", 
"x86_sse_div_ss", "x86_sse_ldmxcsr", "x86_sse_max_ps", "x86_sse_max_ss", 
"x86_sse_min_ps", "x86_sse_min_ss", "x86_sse_movmsk_ps", "x86_sse_mul_ss", 
"x86_sse_pshuf_w", "x86_sse_rcp_ps", "x86_sse_rcp_ss", "x86_sse_rsqrt_ps", 
"x86_sse_rsqrt_ss", "x86_sse_sfence", "x86_sse_sqrt_ps", "x86_sse_sqrt_ss", 
"x86_sse_stmxcsr", "x86_sse_storeu_ps", "x86_sse_sub_ss", "x86_sse_ucomieq_ss", 
"x86_sse_ucomige_ss", "x86_sse_ucomigt_ss", "x86_sse_ucomile_ss", 
"x86_sse_ucomilt_ss", "x86_sse_ucomineq_ss", "x86_ssse3_pabs_b", 
"x86_ssse3_pabs_b_128", "x86_ssse3_pabs_d", "x86_ssse3_pabs_d_128", 
"x86_ssse3_pabs_w", "x86_ssse3_pabs_w_128", "x86_ssse3_phadd_d", 
"x86_ssse3_phadd_d_128", "x86_ssse3_phadd_sw", "x86_ssse3_phadd_sw_128", 
"x86_ssse3_phadd_w", "x86_ssse3_phadd_w_128", "x86_ssse3_phsub_d", 
"x86_ssse3_phsub_d_128", "x86_ssse3_phsub_sw", "x86_ssse3_phsub_sw_128", 
"x86_ssse3_phsub_w", "x86_ssse3_phsub_w_128", "x86_ssse3_pmadd_ub_sw", 
"x86_ssse3_pmadd_ub_sw_128", "x86_ssse3_pmul_hr_sw", "x86_ssse3_pmul_hr_sw_128", 
"x86_ssse3_pshuf_b", "x86_ssse3_pshuf_b_128", "x86_ssse3_psign_b", 
"x86_ssse3_psign_b_128", "x86_ssse3_psign_d", "x86_ssse3_psign_d_128", 
"x86_ssse3_psign_w", "x86_ssse3_psign_w_128", "x86_vcvtph2ps_128", 
"x86_vcvtph2ps_256", "x86_vcvtps2ph_128", "x86_vcvtps2ph_256", 
"x86_wrfsbase_32", "x86_wrfsbase_64", "x86_wrgsbase_32", "x86_wrgsbase_64", 
"x86_xabort", "x86_xbegin", "x86_xend", "x86_xop_vfrcz_pd", "x86_xop_vfrcz_pd_256", 
"x86_xop_vfrcz_ps", "x86_xop_vfrcz_ps_256", "x86_xop_vfrcz_sd", 
"x86_xop_vfrcz_ss", "x86_xop_vpcmov", "x86_xop_vpcmov_256", "x86_xop_vpcomb", 
"x86_xop_vpcomd", "x86_xop_vpcomq", "x86_xop_vpcomub", "x86_xop_vpcomud", 
"x86_xop_vpcomuq", "x86_xop_vpcomuw", "x86_xop_vpcomw", "x86_xop_vpermil2pd", 
"x86_xop_vpermil2pd_256", "x86_xop_vpermil2ps", "x86_xop_vpermil2ps_256", 
"x86_xop_vphaddbd", "x86_xop_vphaddbq", "x86_xop_vphaddbw", "x86_xop_vphadddq", 
"x86_xop_vphaddubd", "x86_xop_vphaddubq", "x86_xop_vphaddubw", 
"x86_xop_vphaddudq", "x86_xop_vphadduwd", "x86_xop_vphadduwq", 
"x86_xop_vphaddwd", "x86_xop_vphaddwq", "x86_xop_vphsubbw", "x86_xop_vphsubdq", 
"x86_xop_vphsubwd", "x86_xop_vpmacsdd", "x86_xop_vpmacsdqh", 
"x86_xop_vpmacsdql", "x86_xop_vpmacssdd", "x86_xop_vpmacssdqh", 
"x86_xop_vpmacssdql", "x86_xop_vpmacsswd", "x86_xop_vpmacssww", 
"x86_xop_vpmacswd", "x86_xop_vpmacsww", "x86_xop_vpmadcsswd", 
"x86_xop_vpmadcswd", "x86_xop_vpperm", "x86_xop_vprotb", "x86_xop_vprotbi", 
"x86_xop_vprotd", "x86_xop_vprotdi", "x86_xop_vprotq", "x86_xop_vprotqi", 
"x86_xop_vprotw", "x86_xop_vprotwi", "x86_xop_vpshab", "x86_xop_vpshad", 
"x86_xop_vpshaq", "x86_xop_vpshaw", "x86_xop_vpshlb", "x86_xop_vpshld", 
"x86_xop_vpshlq", "x86_xop_vpshlw", "xcore_bitrev", "xcore_checkevent", 
"xcore_chkct", "xcore_clre", "xcore_clrsr", "xcore_crc32", "xcore_crc8", 
"xcore_eeu", "xcore_endin", "xcore_freer", "xcore_geted", "xcore_getet", 
"xcore_getid", "xcore_getps", "xcore_getr", "xcore_getst", "xcore_getts", 
"xcore_in", "xcore_inct", "xcore_initcp", "xcore_initdp", "xcore_initlr", 
"xcore_initpc", "xcore_initsp", "xcore_inshr", "xcore_int", "xcore_mjoin", 
"xcore_msync", "xcore_out", "xcore_outct", "xcore_outshr", "xcore_outt", 
"xcore_peek", "xcore_setc", "xcore_setclk", "xcore_setd", "xcore_setev", 
"xcore_setps", "xcore_setpsc", "xcore_setpt", "xcore_setrdy", 
"xcore_setsr", "xcore_settw", "xcore_setv", "xcore_sext", "xcore_ssync", 
"xcore_syncr", "xcore_testct", "xcore_testwct", "xcore_waitevent", 
"xcore_zext"))