Semiconductor: Split plot computer chip data from Littell et al. (2006)
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Semiconductor

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Split plot computer chip data from Littell et al. (2006)

Description

Littell et al. (2006) use the data here to introduce analysis of split plot designs using mixed models. Twelve silicon wafers were randomly selected from a lot, and were randomly assigned to four different processing modes. Resistance on the chips was measured in four different positions (four different chips) on each wafer. Mode of processing and position of chips were fixed factors, while wafer was a random effect. The experimental units with respect to process are the wafers. The experimental units with respect to position are individual chips. Thus the wafer is the whole plot, whereas the positions (chips) are split plot units

Usage

data(Semiconductor)

Format

The dataframe contains four columns:

Resistance: The response variable of interest. Measured in ohms.
Process: The explanatory variable of interest. The type of process used to create the computer chips. A factor with 4 levels.
Wafer: The whole plot containing four chips. There were four wafers tested, i.e. four levels, 1,2,3,4.
Chip: Position on the wafer. These are split plots within the whole plots. Four levels: 1,2,3,4.